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Given the waveform below, derive the output waveform (Q) for the respective devices. All outputs start at RESET (Q = 0) state
a) S-R latch assuming A = S and B = R.
b) Gated D latch assuming C = EN and B = D.
c) Negative Edge-triggered D Flip-flop assuming C = CLK and A = D.
d) Positive Edge-triggered J-K Flip-flop assuming C = CLK, A = J, and B = K.
